ARM System-on-Chips

The following is a list of ARM-based System-on-Chips (SoCs) that either have been used in RISC OS machines, are potentially suitable for RISC OS machines, or have been discussed as possible targets for a RISC OS port.

=ARM9=

Samsung S3C24xx
Based on ARM9 cores. The main member of this family that is relevant to RISC OS is the S3C2440, based on the ARM920T core. However, interest has been expressed in some low-cost netbooks based on the S3C2450, a successor to the S3C2443 (which is an upgraded version of the S3C2440.)

S3C2440 Features

 * ARM920T CPU @ 300, 400, or 533 MHz (400 in A9home)
 * 640x480 24-bpp LCD controller (not used in A9home)
 * AC97 audio support
 * USB 1.1 host and device support

Used in

 * Advantage Six A9home

Compatible with

 * RISC OS Adjust32 4.4x

Documents

 * S3C2440X Product Brief (PDF)

S3C2450 Features

 * ARM926EJ CPU @ 400 or 533 MHz
 * 1024x1024 24-bpp LCD controller
 * 5.1 channel and AC97 audio support
 * USB 1.1 host and 2.0 device support
 * ATA-6 (PATA) support

Used in

 * MenQ EasyPC E790, among other similar Chinese clones

Documents

 * S3C2450 Product Brief (PDF)

Anyka AK7802
Based on ARM926EJ core, clocked at 248 or 266 MHz. Used in some cheap netbooks, but not suitable for RISC OS applications due to poor performance relative to other SoCs currently available, and poor documentation. Windows CE is the only supported OS.

Features

 * ARM926EJ CPU @ up to 266 MHz
 * 800x480 LCD controller
 * USB OTG and host support (unknown version)

Documents

 * Anyka AK7802 product page

Features

 * ARM926EJ CPU @ 266 MHz
 * LCD controller
 * AC97 audio support
 * USB 2.0 host and device support
 * PATA support

Used in

 * Haleron Mio Smartbook

Documents

 * WonderMedia products page

=XScale=

Intel IOP321
Meant for storage applications, including RAID arrays

Features

 * Intel XScale CPU @ 600 MHz
 * 200 MHz DDR SDRAM controller
 * PCI-X expansion bus

Used in

 * Castle IYONIX pc

Compatible with

 * RISC OS 5.x

Documents

 * Intel 80321 (IOP321) datasheet

=Cortex-A8=

Texas Instruments OMAP3
Based on an ARM Cortex-A8 core, different models have different features including a DSP and PowerVR 3D graphics acceleration. OMAP34 and 36 models are primarily intended for handset (cellular phone) applications, and are not listed below. The OMAP35 is derived from the OMAP34.

Common Features

 * ARM Cortex-A8 CPU
 * 2048x2048 24-bit display output (74.25 MHz maximum pixel clock, limit @ 60 Hz refresh rate is approximately 1280x960)
 * USB 2.0 OTG and host support
 * SD/SDIO support

Development boards

 * BeagleBoard and derivatives (OMAP3530)
 * Gumstix Overo (Earth, Air: OMAP3503; Water, Fire: OMAP3530)
 * Direct Insight SwiftModule-OM (OMAP3503, 3515, 3530)

Complete systems

 * OpenPandora (OMAP3530)
 * Always Innovating Touch Book (OMAP3530)

Compatible with

 * RISC OS 5.15

Documents

 * OMAP3530 and 3525 Datasheet (PDF)
 * OMAP3515 and 3503 Datasheet (PDF)

Freescale i.MX515
Another Cortex-A8-based SoC, this one appears to be better suited towards netbook use than the OMAP3, due to including PATA support. However, maximum display resolution is lower.

Features

 * ARM Cortex-A8 CPU @ 800 MHz
 * 3D accelerator
 * 1280x800 24-bpp primary display output
 * USB 2.0 OTG and host support
 * SD/SDIO support
 * ATA-6 (PATA) support

Development boards

 * iWave’s iW-RainboW-G8D
 * Digi’s ConnectCore Wi-i.MX51

Complete systems

 * Genesi Efika MX Open Client

Documents

 * i.MX51 Product Summary

Samsung S5PC100
Similar to TI OMAP3, but may be a better option, as it has CompactFlash support. Currently used in the iPhone 3G S.

Features

 * ARM Cortex-A8 CPU @ up to 800 MHz
 * PowerVR SGX 530 3D accelerator
 * 2048x2048 24-bpp LCD controller, NTSC, PAL, and HDMI 1.2 outputs
 * 5.1 channel audio support
 * USB 2.0 OTG, USB 1.1 host support
 * SD/SDIO support
 * CF (PATA) support

Documents

 * S5PC100 product information

=Acorn-era SoCs=

ARM250
Acorn's own SoC, created for use in several of the pre-RiscPC Archimedes machines. This SoC has obviously been able to run RISC OS ever since it was created, so is listed here purely for the sake of completeness rather than a suggestion that current versions of RISC OS should be back-ported to it.

ARM250 features

 * Cacheless 12MHz CPU core based around ARMv2a architecture
 * MEMC1a memory controller, supporting up to 4MB of RAM
 * VIDC1a audio/video controller
 * IOMD I/O controller

Used in

 * A3010
 * A3020
 * A4000

Compatible with

 * RISC OS 3.1x

ARM7500, ARM7500FE
Another pair of SoCs created by Acorn, this time for use in post-RiscPC Archimedes machines. Unlike the ARM250 these have retained compatability with newer versions of RISC OS, due to their use of a RiscPC-era ISA and VIDC/IOMD hardware.

ARM7500, ARM7500FE features

 * ARM7500: 40MHz CPU, ARMv3 architecture, 4KB cache
 * ARM7500FE: 56MHz CPU, ARMv3 architecture, 4KB cache, FPA, EDO memory controller
 * VIDC20 audio/video controller
 * IOMD I/O controller

Used in

 * A7000 (ARM7500)
 * A7000+ (ARM7500FE)

Compatible with

 * RISC OS 3.60+

=Other=

Marvell Kirkwood 88F6281
Based on Marvell's single-issue ARMv5TE version of Sheeva

88F6281 Features

 * Sheeva CPU 1200 MHz (ARMv5TE), single issue, 16KB I-Cache + 16KB D-Cache
 * 256 KB L2 cache
 * DDR2-400 memory interface, up to 2 GB
 * 2x Gigabit Ethernet
 * 1x PCI Express x1
 * 1x USB2.0 host
 * 2x S-ATA 2.0
 * SD/SDIO support
 * S/PDIF I2S audio in/out
 * 2x 16550 compatible serial ports

Used in

 * eInfochips rd-base ("open-rd" platform)
 * eInfochips rd-client (PDF) ("open-rd" platform)
 * SheevaPlug

Documents

 * Kirkwood Overview
 * Kirkwood Product Brief (PDF)
 * Kirkwood Hardware Spec (PDF)
 * Kirkwood Functional Spec (PDF)

Marvell Discovery Innovation MV78200
Based on Marvell's dual-issue ARMv5TE version of Sheeva. One of the few superscalar ARMs around, capable of out-of-order execution. Probably the highest performance ARM currently available - two cores, big caches, FPU integrated. Also available as a pin-compatible single core version (MV78100), which is clockable up to 1200 MHz.

MV78200 Features

 * 2 Sheeva cores at 1000 MHz (ARMv5TE), dual issue, 32KB I-Cache + 32KB D-Cache, FPU (VFP style) per core
 * 512 KB L2 cache per core
 * DDR2-400 memory interface with bank interleaving
 * 4x Gigabit Ethernet (2x for MV78100)
 * 2x PCI Express x4 (each can be used as 4 x1 ports)
 * 3x USB2.0 host
 * 2x S-ATA 2.0
 * 4x 16550 compatible serial ports

Used in

 * Marvell DB-MV78200-A0

Documents

 * Discovery Innovation Overview
 * Product Brief (PDF)
 * Hardware Spec (PDF)
 * Functional Spec (PDF)