StrongARM: Difference between revisions
From RISC OS
Jump to navigationJump to search
No edit summary |
|||
(5 intermediate revisions by 2 users not shown) | |||
Line 2: | Line 2: | ||
The StrongARM was used in the Acorn and Castle [[RiscPC]], the Castle [[Kinetic]] RiscPC, and the [[MicroDigital Omega]]. |
The StrongARM was used in the Acorn and Castle [[RiscPC]], the Castle [[Kinetic]] RiscPC, and the [[MicroDigital Omega]]. |
||
==RiscPC Processor Cards== |
==RiscPC Processor Cards== |
||
[[File:SA110Kfront1600px.JPG|200px|thumb|Frontside]] |
|||
⚫ | |||
[[File:SA110Kback1600px.JPG|200px|thumb|Backside]] |
|||
⚫ | |||
*160 MHz (overclocked from the factory to 200 MHz) |
*160 MHz (overclocked from the factory to 200 MHz) |
||
*200 MHz |
*200 MHz |
||
*233 MHz |
*233 MHz |
||
The minimum RISC OS version for StrongARM is 3.70. There are various chip revisions, only revisions T and later are able to run an optimised 'lazy' task swapping mode. |
|||
==Kinetic Processor Cards== |
==Kinetic Processor Cards== |
||
Line 18: | Line 22: | ||
* [http://en.wikipedia.org/wiki/StrongARM Wikipedia Entry] |
* [http://en.wikipedia.org/wiki/StrongARM Wikipedia Entry] |
||
* [http://www.riscos.org/csafaq/part1.html#1_11 Lazy Task Swapping (FAQ)] |
|||
* [http://www.hpl.hp.com/hpjournal/dtj/vol9num1/vol9num1art5.pdf StrongARM Description from DEC Digital Technical Journal (now at HP.com)] |
|||
{{stub}} |
{{stub}} |
Latest revision as of 21:14, 29 September 2018
The StrongARM is an ARMv4 processor designed and originally manufactured by Digital Equipment Corporation, and later manufactured by Intel. It was replaced by the XScale in Intel's lineup.
The StrongARM was used in the Acorn and Castle RiscPC, the Castle Kinetic RiscPC, and the MicroDigital Omega.
RiscPC Processor Cards
Acorn sold three StrongARM processor cards, based on the Digital SA-110, for the RiscPC. The only difference between them is the speed rating of the SA-110 used, and the speed that the cards were set to run. These cards are:
- 160 MHz (overclocked from the factory to 200 MHz)
- 200 MHz
- 233 MHz
The minimum RISC OS version for StrongARM is 3.70. There are various chip revisions, only revisions T and later are able to run an optimised 'lazy' task swapping mode.
Kinetic Processor Cards
Main article: Kinetic
MicroDigital Omega
Main article: MicroDigital Omega
See Also
- Wikipedia Entry
- Lazy Task Swapping (FAQ)
- StrongARM Description from DEC Digital Technical Journal (now at HP.com)