StrongARM: Difference between revisions
From RISC OS
Jump to navigationJump to search
| Line 9: | Line 9: | ||
*233 MHz |
*233 MHz |
||
The minimum RISC OS version for StrongARM is 3.70. There are various chip revisions, not all of them are able to run in lazy task swapping mode. |
The minimum RISC OS version for StrongARM is 3.70. There are various chip revisions, not all of them are able to run in lazy task swapping mode. |
||
[[File:SA110Kfront1600px.JPG|200px|thumb|left|Frontside]] |
|||
[[File:SA110Kback1600px.JPG|200px|thumb|left|Backside]] |
|||
==Kinetic Processor Cards== |
==Kinetic Processor Cards== |
||
Revision as of 20:38, 20 September 2018
The StrongARM is an ARMv4 processor designed and originally manufactured by Digital Equipment Corporation, and later manufactured by Intel. It was replaced by the XScale in Intel's lineup.
The StrongARM was used in the Acorn and Castle RiscPC, the Castle Kinetic RiscPC, and the MicroDigital Omega.
RiscPC Processor Cards
Acorn sold three StrongARM processor cards, based on the Digital SA-110, for the RiscPC. The only difference between them is the speed rating of the SA-110 used, and the speed that the cards were set to run. These cards are:
- 160 MHz (overclocked from the factory to 200 MHz)
- 200 MHz
- 233 MHz
The minimum RISC OS version for StrongARM is 3.70. There are various chip revisions, not all of them are able to run in lazy task swapping mode.
Kinetic Processor Cards
Main article: Kinetic
MicroDigital Omega
Main article: MicroDigital Omega
See Also
- Wikipedia Entry
- Lazy Task Swapping (FAQ)
- StrongARM Description from DEC Digital Technical Journal (now at HP.com)
